In recent years, image readers have been known which obtain a color image by arranging one-dimensional pixel lines in a plurality of rows in a vertical direction, each pixel line having a plurality of pixels arranged in a horizontal direction, and moving this plurality of one-dimensional pixel lines in a vertical direction relatively to an original document.
For example, Patent Document 1 discloses a CCD type solid-state imaging apparatus which is capable of acquiring not only color images, but also black and white images, with high sensitivity and at high speed, by transferring pixel signals generated by first to third pixel lines having blue, green and red filters, by a CCD shift register.
However, the solid-state imaging apparatus according to Patent Document 1 uses a CCD system, and therefore it is essential to provide a transfer gate and a CCD shift register between each of the one-dimensional pixel lines, which means that there is a prescribed limit on reducing the arrangement pitch of the one-dimensional pixel lines in the vertical direction.
Consequently, if the solid-state imaging apparatus according to Patent Document 1 is applied to the image reader described above, then since the arrangement pitch of the one-dimensional pixel lines in the vertical direction is large, it is difficult to cause the one-dimensional pixel lines in each row to expose the same line of an original document, due to operational errors of the movement mechanism which moves the one-dimensional pixel lines at a prescribed scanning speed in the vertical direction relatively to the original document (for example, due to fluctuations in the scanning speed). As a result of this, color deviations occur. Therefore, it is desirable for the arrangement pitch between the one-dimensional pixel lines in the vertical direction to be small.
Therefore, Patent Document 2 discloses a linear sensor which in an R/B sensor array 12-2 comprising alternately arranged red and blue pixels and a G sensor array 12-1 comprising an arrangement of green pixels are disposed without gaps therebetween in the vertical direction.
In order to achieve this, in Patent Document 2, read-out gate sections 13-1 and 13-2 are arranged so as to be disposed on either side of the G sensor arrays 12-1, 12-2, and CCD analog shift registers 14-1 and 14-2 are arranged so as to be disposed on either side of the read-out gate sections 13-1 and 13-2.
However, Patent Document 2 only discloses a case where there are two sensor arrays and does not refer to a case where there are three or more sensor arrays. Therefore, it is not clear how the read-out gate sections and the CCD analog shift registers should be disposed if three or more sensor arrays are arranged without gaps therebetween in the vertical direction.
Furthermore, Non-Patent Document 1 discloses a CCD linear sensor in which an R sensor array, a G sensor array and a B sensor array are arranged in this order without gaps therebetween in the vertical direction.
In order to achieve this, in Non-Patent Document 1, an R read-out gate is arranged to the upper side of the R sensor array, and G and B read-out gates are arranged to the lower side of the B sensor array.
However, in Non-Patent Document 1, vertical transfer gates for transferring the pixel signals of the G line sensor to the G and B read-out gates are arranged between the respective B pixels which constitute the B sensor array. Therefore, the light receiving area of each B pixel becomes smaller and the sensitivity of the B pixels declines.
Furthermore, Patent Document 3 discloses a CMOS-type solid-state imaging apparatus which comprises one-dimensional pixel lines in 3 rows of R, G, B which are moved in a vertical direction relatively to an original document, and a read-out circuit which is common to the respective lines and which reads out pixel signals from the respective one-dimensional pixel lines.
However, in Patent Document 3, in order to ensure that the read-out interval of the pixel signals is a prescribed time period or longer, the arrangement pitch P of the one-dimensional pixel lines in the vertical direction is set to satisfy the relationship P≧(4/3)·W with respect to the width W of the light receiving area of each pixel in the vertical direction. Therefore, in Patent Document 3, there is a prescribed limit on the extent to which the arrangement pitch can be reduced, and consequently there is a problem in that color deviation occurs due to the fluctuations in the scanning speed, as described above.
Patent Document 1: Japanese Patent Application Laid-open No. 2002-142078
Patent Document 2: Japanese Patent Application Laid-open No. H10-51602
Patent Document 3: Japanese Patent Application Laid-open No. 2007-336519
Non-Patent Document 1: SONY CX-PAL (Vol. 65) p. 12-13